Definition: Establishing properties of hardware or software designs using logic, rather than (just) testing or informal arguments. This involves formal specification of the requirement, formal modeling of the implementation, and precise rules of inference to prove, say, that the implementation satisfies the specification.
See also model checking, temporal logic, formal methods.
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Entry modified 17 December 2004.
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Cite this as:
Sandeep Kumar Shukla, "formal verification", in Dictionary of Algorithms and Data Structures [online], Paul E. Black, ed. 17 December 2004. (accessed TODAY) Available from: https://www.nist.gov/dads/HTML/formalverf.html